memory arrayの例文

• It implemented a TTL bus to which memory array modules were connected.
• The memory array modules were installed in a dedicated backplane separate from the NMI backplane.
• The memory array was scanned once to store all 1 s in the memory elements.
• It uses dense two-dimensional memory arrays to store large multiple-input multiple-output LUTs.
• The memory was controlled by the M Box, which also provided the memory array bus used to access the memory.
• Historically, testing of magnetic core memory arrays produced the " shmoo " shape and the term continued into the semiconductor era.
• The memory was constructed from 4 or 16 kbit metal oxide semiconductor ( MOS ) RAM chips mounted on memory array cards.
• The VAX 8800 and 8700 supported one to eight memory array modules; the VAX 8550 and 8500, one to five.
• To use the video port, the controller first uses the DRAM port to select the row of the memory array that is to be displayed.
• In August 2013, Crossbar emerged from stealth-mode and announced the development of a working Crossbar memory array at a commercial NAND Flash memory.
• For a pipelined write, the write command can be immediately followed by another command without waiting for the data to be written into the memory array.
• Using a cross-grid interconnect arrangement, the NRAM and driver, ( the cell ), forms a memory array similar to other memory arrays.
• Using a cross-grid interconnect arrangement, the NRAM and driver, ( the cell ), forms a memory array similar to other memory arrays.
• The memory system consisted of three major parts, a memory controller, a transistor-transistor logic ( TTL ) bus and one to eight memory array modules.
• Rather, a series of control registers in a special address region support Read and Write commands, which can be used to erase and program the memory array.
• Each thread reading from a database gains ownership of an element in a shared memory array, which it may update to indicate when it is within a transaction.
• Commercially available semiconductor antifuse-based OTP memory arrays have been around at least since 1969, with initial antifuse bit cells dependent on blowing a capacitor between crossing conductive lines.
• I may be able to write the system to work with no disk writes ( convert all the tables to memory arrays ), but that would be a LOT of work.
• Proprietary 128-pin memory array modules ( SIMMs ) with capacities of 8 MB ( 39 1 Mbit DRAM chips ) or 32 MB ( 39 4 Mbit DRAM chips ) are used.
• This transfers the selected row from the memory array to one of 4 or 8 ( selected by the BA bits ) row data buffers, where they can be read by a Read command.